| Registers | CPSR | ||
|---|---|---|---|
| r0 | 0 | N - Sign Flag [bit 31] | 0 |
| r1 | 0 | Z - Zero Flag [bit 30] | 0 |
| r2 | 0 | C - Carry Flag [bit 29] | 0 |
| r3 | 0 | V - Overflow Flag [bit 28] | 0 |
| r4 | 0 | Q - Sticky Overflow [bit 27] | N/A |
| r5 | 0 | I - IRQ disable [bit 7] | 0 |
| r6 | 0 | F - FIQ disable [bit 6] | 0 |
| r7 | 0 | T - State Bit [bit 5] | 0 |
| r8 | 0 | Mode [bit 4 - bit 0] | 0 |
| r9 | 0 | total value (all bits) | 0 |
| r10 | 0 | ||
| r11 | 0 | ||
| r12 | 0 | ||
| r13(sp) | 0 | ||
| r14(lr) | 0 | ||
| r15(pc) | 0 | ||
| SPSR | N/A |